1. The Field of the Invention
This invention relates to conductive metal vias in ceramic substrates and methods for producing the same, including paste compositions for forming the same.
2. The State of the Art
Integrated circuit packages are one of the most important applications for high performance ceramics in the microelectronics industry; circuit packages are single- or multilayer passive devices having an insulating or dielectric portion and an electrical or conductor portion. The dielectric portion is usually in the geometry of a substrate layer, and the conductor portion can exist as a circuit pattern on the substrate surface and/or as a conduit or via connecting the surfaces.
Integrated circuit packages serve two essential functions. The primary function is as a passive electronic device, to provide the densest and most conductive wiring pattern possible. The second essential function is t house and protect the semiconductor integrated circuit device that the wiring pattern serves. These functions are limited by the intrinsic electrical and physical properties of the materials and by defects introduced during processing.
For the substrate structure, alumina is the dielectric material of choice for most packaging applications because of its relatively low cost with respect to its intrinsic properties; to achieve properties in the dielectric portion approaching those intrinsic to the material requires achieving a high density, essentially pure substrate. The art has resorted to the addition of minor amounts (generally 2-6 wt. %) of glass in the dielectric composition to promote liquid phase sintering at about 1500.degree. C. Such glass compositions are typically an aluminosilicate or aluminate (e.g., U.S. Pat. No. 4,835,039 (filed 26 Nov. 1986, Ser. No. 935,264), U.S. Pat. No. 4,734,233, and U.S. Pat. No. 4,678,683, all incorporated herein by reference). M recently, the art has moved to pure alumina substrates, essentially glass free, as described, for example, in the present assignee's U.S. Pat. No. 4,769,294.
The choice of an electric material depends, in part, on the method chosen for fabrication of the package. Thick film techniques involve providing a paste or ink from sinterable particles and an organic vehicle; the ink is then screen-printed onto the substrate in the desired circuit pattern and fired to yield a circuit path. The sinterable particles are generally metallic copper for conductive circuit paths, and are other materials if it is desired to provide capacitors, resistors, and similar electronic components.
However, a drawback to essentially pure alumina substrates is that they require sintering at a much higher temperature than those with glass; pure alumina substrates generally sinter at 1550.degree.-1650.degree. C., while copper, gold, and silver sinter at less than about 1000.degree. C. This temperature difference is not important unless co-sintering of the dielectric and the conductor is desired; with such disparate sintering temperatures, the earlier sintering metallic component will become liquid and be drawn into the green dielectric layer. Co-sintering requires a more refractory metal, such as tungsten or molybdenum, which, with the addition of sintering aids, sinters at about the same temperature as alumina; unfortunately, refractory metals are pool electrical conductors. Therefore, co-sintering requires a compromise in the electrical properties of the package.
Rather than co-sintering, simpler and less elegant postfired fired metallization techniques can be used. Generally, such methods are limited to making single layer devices that are densified, printed with a circuit pattern, and re-fired; low temperature sintering metals (e.g., copper) can be used in these methods because the dielectric is fully dense, and thus does not wick the metallization. Accordingly, these methods are limited to single layer geometries because lamination to a green layer will result in wicking of the non-refractory metal.
The advantages obtained from co-fired multilayer packages thus require resort to a refractory metal. Multilayer packages can be made by co-sintering a laminated array of green sheets having metallized electrical portions (as described by out U.S. Pat. No. 4,861,641, (Ser. No. 053,323, field 22 May 1987)) or by a post-firing process using a refractory metal-based ink, laminating, firing, and repeating as desired (as described, for example, in U.S. Pat. No. 4,289,719, which use glass in the dielectric portion).
An important consideration when pressureless sintering different materials into an integral unit article, especially where the different materials include metal and ceramic, is differences in shrinkage and thermal expansion between the materials and the extent of those differences. One factor influencing whether shrinkage and thermal expansion differences are important is the relative geometries during co-sintering. For example, in the case where a metallizing composition is screen printed onto a substrate, the trace pattern is so significantly thinner than the substrate and is spread out over such a large area that the shrinkage and expansion characteristics of the substrate will dominate. Such behavior is generally applicable where the metallization is densified in a post-firing operation; in a co-firing operation, the metallization composition must be altered in an attempt to approximate the shrinkage of the green substrate to avoid excessive camber.
However, in the case of vias, thermal and shrinkage mismatch are more independent and can have catastrophic consequences. The thermal and shrinkage attributes interact much more in the geometry of a via than in the case of a very thin circuit trace. If the via composition shrinks more than the ceramic, it may pull away from the substrate. Accordingly, bonding of the metal t the ceramic is a primary concern (it is also a concern with circuit traces, but less so). If the via composition shrinks less than the substrate, the ceramic will likely fracture. After densification, thermal mismatch can have similar effects; e.g., upon cooling from the peak firing temperature, the metal may contract more than the ceramic, similarly precipitating cracks in the ceramic and/or fracturing the metal-to-ceramic bonding in the via hole.
Vias are typically formed in substrates for thin film application (i.e., trace patterns made by vapor deposition or sputtering) by "drilling" a hole in the substrate and then coating the inside of the hole with a thin layer of metal using lithography, vapor deposition, and plating processes. A typical via is therefore a hollow, metal coated conduit, often referred to as a "plated `thru hole`". In actual production, the via is then filled with a resist material for further processing steps, such as the application of thin or thick film conductor patterns. After the subsequent processing, the resist material is etched out from the via, and the final article again has a hollow, metal coated conduit.
Because of the small tolerances (typically less than or equal to 2.0 mils absolute) in the hole position required for thin film processing, laser drilling of the via holes is commonly practiced; although laser systems provide precise hole positioning, many problems are associated with this method. Slag and other defects, such as microcracks, are often generated on the substrate around the via holes; these defects can degrade the adhesion and quality of the subsequently applied thin film metallurgy. The creation of such defects reduces reproduciblity of the laser drilled holes is, and thus the distribution of the electrical characteristics of the vias may be unacceptably broad; this results in lower process yields. After drilling, residual stresses around via holes generally remain through to subsequent processing; these latent stresses can cause fracture to the substrate during subsequent assembly operations, particularly during soldering. Latent defects that cause failure in the final assembly steps of an electronic subsystem can be very costly, orders of magnitude greater than the cost of the failed IC package. Although laser induced stresses may be reduced by heat treating prior to metallizing, the product quality is still less than desirable.
Vias are also used to facilitate heat transfer away from the silicon die (i.e., semiconductor integrated circuit device). Metal, being a better thermal conductor than ceramic, is used in the vias as a thermal conduit. Thus, in connection with the function of the package to house and protect the IC, the package must facilitate rapid heat transfer away from the IC chip.
In this regard (to house and protect the IC), hermiticity of vias is also an important consideration. It is very difficult to fabricate a via that is both completely (.gtoreq.99%) dense and also hermetic; hermeticity is usually determined by a helium leak rate test, with leak values not greater than 10.sup.-8 cc/sec being acceptable. However, it is important to note that for a single substrate or package having multiple vias, a hermeticity failure in any single via makes the entire package non-hermetic. Accordingly, the art commonly practices making the entire package hermetic by providing an integral metal plate on the back, typically by screen printing or plating (the plate is often used as an electrical ground plane); this, to a large extent, obviates the need for individual via hermeticity.
It would be beneficial to provide a via composition, for both cofire and post-fire applications, having improved bonding characteristics and improved shrinkage characteristics more closely approximating those of the ceramic, whereby stronger, more crack-free IC packages could be fabricated. It would also be advantageous to provide a via composition having good electrical and thermal conductance which can also be con-sintered with the ceramic; generally, if the ink can be co-sintered it can be post-fired (the converse not necessarily being so true). It would also be valuable to provide hermetic vias having these desired characteristics.